High speed is important for the use of a memory device. To provide a high-speed memory device, particularly a three-dimensional (3D) memory device, one way is increasing the density of bit lines. A higher bit line density is beneficial to parallel operation, and thereby the speed can be increased. At the same time, the number of string select lines can be decreased. Some other advantages, such as reduced read disturbance and reduced power consumption, may be obtained due to the decrease of the string select line number.
However, a higher bit line density means a smaller space between the bit lines, and thereby a higher capacitance (C). In addition, a smaller line width may be needed for forming high-density bit lines, and the resistance (R) may be increased. Both the higher capacitance and the increased resistance are disadvantageous for the RC delay (R*C). The higher capacitance is also disadvantageous for the power consumption (C*V2). Further, in some manufacturing processes, forming high-density bit lines may cause a higher litho-etch process cost.